Patent · US Active

Controller having flash memory testing functions, and storage system and testing method thereof

US8086919B2 · kind B2 · utility

12Cited by
14References
23Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 22, 2009
Grant dateDec 27, 2011
Priority date
Expiry dateJan 26, 2030

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C2029/0401
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A flash memory controller having a flash memory testing functions is provided, in which the flash memory controller includes a microprocessor unit, a flash memory interface unit, a host interface unit and a memory cell testing unit. The flash memory interface unit is configured for connecting a plurality of flash memory chips, where each flash memory chip has a plurality of flash memory dies and each flash memory die has a plurality of physical blocks. The host interface unit is configured for connecting a host system. The memory cell testing unit is configured for determining whether the physical blocks can be normally written, read and erased. Accordingly, the flash memory controller can perform a flash memory testing under a command of the host system and all the physical blocks of the flash memory chip can be tested during the flash memory testing.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.