Semiconductor memory device and method of forming the same
US8089801B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 9, 2008 |
| Grant date | Jan 3, 2012 |
| Priority date | — |
| Expiry date | Sep 20, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention discloses a semiconductor memory device comprising a source, a drain, a floating gate, a control gate, a recess channel and a gated p-n diode. The said p-n diode connects said floating gate and said drain. The said floating gate is for charge storage purpose, it can be electrically charged or discharged by current flowing through the gated p-n diode. An array of memory cells formed by the disclosed semiconductor memory device is proposed. Furthermore, an operating method and a method for producing the disclosed semiconductor memory device and array are described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.