Systems and methods for serial cancellation
US8090006B2 · kind B2 · utility
17Cited by
194References
58Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 29, 2010 |
| Grant date | Jan 3, 2012 |
| Priority date | — |
| Expiry date | Oct 29, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B2201/709718
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A receiver in a CDMA system comprises a front end processor that generates a combined signal per source. A symbol estimator processes the combined signal to produce symbol estimates. An S-Matrix Generation module refines these symbol estimates based on the sub channel symbol estimates. An interference canceller is configured for cancelling interference from at least one of the plurality of received signals for producing at least one interference-cancelled signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.