System and method of transistor switch biasing in a high power semiconductor switch
US8093940B2 · kind B2 · utility
19Cited by
4References
29Claims
0Family size
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Key dates
| Filing date | Apr 16, 2010 |
| Grant date | Jan 10, 2012 |
| Priority date | — |
| Expiry date | Jul 9, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/44
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A system and method are provided for biasing transistor switches in a semiconductor based high power switch. Off-state Vgsd biasing for the off transistor switches is based upon acceptable levels of spurious harmonic emissions and linearity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.