Transmitter with delay mismatch compensation
US8094054B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 19, 2007 |
| Grant date | Jan 10, 2012 |
| Priority date | — |
| Expiry date | Jul 8, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2027/0016
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A transmitter device comprises a digital part and an analog part. The digital part comprises a digital modulator for receiving bits and for digitally modulating the received bits. The transmitter device includes first and second digital-to-analog converters. The transmitter device furthermore comprises at least one filter unit arranged in the digital part and coupled between at least one of the first and second digital-to-analog converters and the digital modulator. A table unit is coupled to the at least one filter unit and is used to store pre-defined compensation filter values for the at least one filter unit to compensate different delay mismatches in the analog part of the transmitter device. The filter values of the at least one filter unit are set to those compensation filter values as stored in the table unit (TU) which correspond to a determined delay mismatch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.