Multi-stage multi-core processing of network packets
US8094560B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 19, 2008 |
| Grant date | Jan 10, 2012 |
| Priority date | — |
| Expiry date | Mar 28, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/351
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Techniques for multi-stage multi-core processing of network packets are described herein. In one embodiment, work units are received within a network element, each work unit representing a packet of different flows to be processed in multiple processing stages. Each work unit is identified by a work unit identifier that uniquely identifies a flow in which the associated packet belongs and a processing stage that the associated packet is to be processed. The work units are then dispatched to multiple core logic, such that packets of different flows can be processed concurrently by multiple core logic and packets of an identical flow in different processing stages can be processed concurrently by multiple core logic, in order to determine whether the packets should be transmitted to one or more application servers of a datacenter. Other methods and apparatuses are also described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.