Controlling jittering effects
US8094646B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 25, 2010 |
| Grant date | Jan 10, 2012 |
| Priority date | — |
| Expiry date | Feb 25, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04W72/12
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Effects of variation in computational latency can be controlled by using a processor to perform computations associated with a signal processing process, each computation related to processing an input sample to generate an output, and allocating a processing cost per computation that is less than a maximum processing cost of the processor for performing any one of the computations and greater than an average processing cost of the processor for performing the computations. The allocated processing cost for a computation is an allocated time period between receipt of the input sample and generation of the output for the computation. A task requiring a processing time greater than the allocated processing cost is handled as a source of jitter in the signal processing process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.