Method and apparatus for modeling source-drain current of thin film transistor
US8095343B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 29, 2008 |
| Grant date | Jan 10, 2012 |
| Priority date | — |
| Expiry date | Jul 9, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/367
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided are a method and apparatus for modeling source-drain current of a TFT. The method includes receiving sample data, the sample data including a sample input value and a sample output value; adjusting modeling variables according to the sample data; calculating a current model value according to the adjusted modeling variables; when a difference between the calculated current model value and the sample output value is smaller than a predetermined threshold value, fitting a current model by applying the adjusted modeling variables to the current model; applying actual input data to the fitted current model; and outputting a result value corresponding to the actual input data, wherein the current model is a model for predicting the source-drain current of the TFT.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.