Non-sequential transfer of data from a memory
US8095745B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 6, 2007 |
| Grant date | Jan 10, 2012 |
| Priority date | — |
| Expiry date | Aug 23, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/0038
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The disclosed embodiments relate to a memory controller for retrieving a plurality of data stored in a memory in communication with the memory controller, the plurality of data being characterized by a first arrangement of first and second non-parallel arrays, such as one-dimensional arrays. The first array comprises at least first and second data of the plurality of data and the second array comprises at least the first data and third data of the plurality of data. The memory is operative to provide the at least first and second data of the first array before providing at least the third data of the second array when the memory is accessed based on an address of the first data in the memory and an amount of the plurality of data to provide starting from the address of the first data. The memory controller includes an address receiver operative to receive the address of the first data and a request generator in communication with the address receiver and the memory and operative to cause, based on the received address, the memory to provide the at least first data and third data of the second array before providing at least the second data of the first array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.