Method of acquiring a plurality of logic signals, with confirmation of state validity
US8095843B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 14, 2010 |
| Grant date | Jan 10, 2012 |
| Priority date | — |
| Expiry date | Jul 20, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/00346
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method of ACM acquisition/confirmation of a plurality of logic signals SI(i) combines a loop for the single confirmation processing for all the sampled signals, with a sequential sampling of these signals. On each sampling, the confirmation loop processes the current sampled signal SI(i), in order to decide on the updating of an output register Qs(i) with the current sampled state Sk, depending on whether or not it is confirmed, either that this state is not to be confirmed, or that this state is to be confirmed, and that the associated confirmation duration τ has elapsed. The confirmation loop uses a dating mechanism capable of supplying a current date used to supply the dates on which the logic state transitions are observed, and to allow measurements of the elapsed durations since these transition dates, and, for each processed signal, a parameter memory M-P(i), making it possible to program the confirmation of the associated signal as a function of criteria common to all the signals, and a status memory M-ST(i) which stores at least two items of information ST1 and ST2 corresponding respectively to the last state seen Sp for this signal and to the date of transition Dt into t…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.