Vacuum chamber system for semiconductor processing
US8097084B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 19, 2007 |
| Grant date | Jan 17, 2012 |
| Priority date | — |
| Expiry date | Oct 20, 2030 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S414/139
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A vacuum chamber system for semiconductor processing includes at least two evacuable vacuum chambers for receiving semiconductor elements to be processed, each including a vacuum chamber opening and a vacuum chamber sealing surface, and transfer aspects by which one of the vacuum chambers can be moved relative to another of the vacuum chambers and can be docked with it in a vacuum-tight manner by producing substantially parallel opposite positions of the vacuum chamber sealing surfaces which are subject to possible misalignments. At least one of the vacuum chambers has support aspects which support one vacuum chamber on the other vacuum chamber in the evacuated, docked state. The support aspects are in the form of two support elements which are arranged on opposite sides of the vacuum chamber opening, are substantially parallel to the opening central axis and have an operative connection to one another and have a force and displacement balance relative to one another with a balance center located substantially on the opening central axis, so that, in the docked state non-parallel positioning of the vacuum chamber sealing surfaces opposite one another, caused by possible misalignmen…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.