Memory cell with alignment structure
US8097870B2 · kind B2 · utility
13Cited by
31References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 12, 2009 |
| Grant date | Jan 17, 2012 |
| Priority date | — |
| Expiry date | Jan 1, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C13/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory cell that includes a memory element configured for switching from a first data state to a second data state by passage of current therethrough. The memory cell includes a top electrode and a bottom electrode for providing the current through the memory cell, and an alignment element positioned at least between the top electrode and the top surface of the memory element, the alignment element having an electrically conductive body tapering from the top electrode to the top surface of the memory element. Methods for forming the memory cell are also described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.