Thin film transistor array panel and method for manufacturing the same
US8101445B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 1, 2009 |
| Grant date | Jan 24, 2012 |
| Priority date | — |
| Expiry date | Feb 17, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
Abstract
A thin film transistor array panel according to the present invention includes: an insulation substrate having a display area and a peripheral area; a plurality of thin film transistors disposed in the display area; a plurality of gate lines connected to the thin film transistors; a plurality of data lines connected to the thin film transistors; a driving unit disposed in the peripheral area of the insulation substrate, and controlling the thin film transistor; a plurality of signal lines connecting between the driving unit and the gate lines or the data lines; and a dummy pattern overlapping the signal line and made of a transparent conductive material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.