Methods of manufacturing semiconductor devices having contact plugs in insulation layers
US8101515B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 23, 2010 |
| Grant date | Jan 24, 2012 |
| Priority date | — |
| Expiry date | Sep 14, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/482
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of manufacturing semiconductor devices are provided in which a first contact plug is formed on a first active region in a substrate and a second contact plug is formed on a second active region in the substrate. A height of an upper surface of the second contact plug from the substrate is greater than a height of an upper surface of the first contact plug from the substrate. A third contact plug is formed on the second contact plug. A first spacer is formed on a side surface of the third contact plug. A third interlayer insulation layer is formed that covers the third contact plug. The third interlayer insulation layer is patterned to form a third opening that exposes the first contact plug. A fourth contact plug is formed in the third opening that is electrically connected to the first contact plug.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.