Setting controller VREF in a memory controller and memory device interface in a communication bus
US8102724B2 · kind B2 · utility
5Cited by
17References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 29, 2009 |
| Grant date | Jan 24, 2012 |
| Priority date | — |
| Expiry date | Jul 22, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2254
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device is connected through an interface to a memory controller. The controller's reference voltage is set based on a driver's impendence of the memory device during driver training. The voltage is applied to a reference resistor pair at the controller and changed until the voltage level switches. The voltage is then set at the reference resistor pair of the controller.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.