Transceiver link bit error rate prediction
US8103469B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 7, 2005 |
| Grant date | Jan 24, 2012 |
| Priority date | — |
| Expiry date | Oct 4, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31709
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method for predicting a predetermined bit error rate for an actual data transmission from a transmitter to a target receiver over an actual backplane link is disclosed. The method involves defining a simulated backplane corresponding to an actual backplane link intended to be used for data transmission between a transmitter and a target receiver. Once the simulated backplane is defined, a data transmission from the transmitter to the receiver is simulated and captured across the simulated backplane. A waveform simulation of the data transmission over the simulated backplane is then generated. The waveform simulation takes into account characteristics of the simulated backplane and the target receiver. From the waveform simulation, a total jitter for a predetermined bit error rate for the data transmission is extrapolated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.