Method for fabricating variable parallel plate capacitors
US8105498B2 · kind B2 · utility
1Cited by
3References
17Claims
0Family size
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Key dates
| Filing date | Nov 21, 2007 |
| Grant date | Jan 31, 2012 |
| Priority date | — |
| Expiry date | Nov 30, 2030 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/22
Abstract
A method for fabricating micromachined structures is provided. A structure including a dielectric layer, a metal layer and a passivation layer is formed, wherein the dielectric layer has a via thereon. An etching window is formed on the passivation layer. An etching solution is poured into the via through the etching window to perform a process of etching. After etching, the etching solution is removed and the passivation layer is removed. Finally, the structure is etched again to form the micromachined structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.