Order independent method of performing statistical N-way maximum/minimum operation for non-Gaussian and non-linear distributions
US8108815B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 26, 2009 |
| Grant date | Jan 31, 2012 |
| Priority date | — |
| Expiry date | Apr 10, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system to improve the performance of an integrated circuit (IC) chip by removing timing violations detected by performing a statistical timing analysis, given distributions of process and environmental sources of variation. The distributions are quantized using a minimum distortion criterion into discrete values. For each timing node of the IC circuit, a discrete minimum and maximum operation is performed on the timing parameters using a subset of combinations of the discrete values. The results of the discrete minimum and maximum operation are then de-quantized and propagated to a subsequent timing node and edge thereof. The process continues until one or more primary inputs and outputs of the IC chip are reached. The design of the IC chip is modified by removing all the timing violations identified.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.