Patent · US Active

III-V photonic integration on silicon

US8110823B2 · kind B2 · utility

57Cited by
5References
7Claims
0Family size

Assignee

Inventor

Key dates

Filing dateSep 22, 2006
Grant dateFeb 7, 2012
Priority date—
Expiry dateJul 6, 2027

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02P70/50
  • WIPO fieldOptics
  • WIPO sectorInstruments

Abstract

Photonic integrated circuits on silicon are disclosed. By bonding a wafer of III-V material as an active region to silicon and removing the substrate, the lasers, amplifiers, modulators, and other devices can be processed using standard photolithographic techniques on the silicon substrate. The coupling between the silicon waveguide and the III-V gain region allows for integration of low threshold lasers, tunable lasers, and other photonic integrated circuits with Complimentary Metal Oxide Semiconductor (CMOS) integrated circuits.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.