Time-alignment of two signals used for digital pre-distortion
US8111101B2 · kind B2 · utility
5Cited by
10References
3Claims
0Family size
Inventors
Key dates
| Filing date | Jul 8, 2010 |
| Grant date | Feb 7, 2012 |
| Priority date | — |
| Expiry date | Jul 8, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F1/3247
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A digital pre-distortion system which can provide the flexibility to model the highly non-linear distortion associated with High Efficiency RF Power Amplifiers while through a novel implementation of a least squares estimation process allows an implementation well suited for an FPGA application where limited resources and in particular memory resources are available.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.