Multiplexing apparatus and method
US8111721B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 2, 2003 |
| Grant date | Feb 7, 2012 |
| Priority date | — |
| Expiry date | Nov 11, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N21/4341
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A multiplexing system (10) is provided which includes a plurality of encoders (12-15) which generates elementary streams, respectively, CPU (16), multiplexer (17), instruction memory (18), and a data memory (19) which stores a plurality of elementary data to be multiplexed. Each of the encoders (12-15) divides elementary data into units, and stores the data into the data memory (19). The CPU (16) generates, for each of the data units, instruction data having stated therein a storage location in the data memory (19) and stores the instruction data into the instruction memory (18). The multiplexer (17) reads the instruction data one by one from the instruction memory (18), and reads data units stated in the instruction data sequentially from the data memory (19), for generation of a multiplexed stream. Thus, the burden of processing to the controller can be lessened.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.