Processor power management
US8112250B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 3, 2008 |
| Grant date | Feb 7, 2012 |
| Priority date | — |
| Expiry date | Jul 19, 2030 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Semiconductor device circuits and methods are provided for adjusting core processor performance and energy-efficiency based on usage metrics. Metric detection, performance state selection, and adjustment are done in digital logic hardware without intervening input from system software or firmware, thus greatly speeding the processor performance adjustment. Mapping usage and state information to desired processor power-performance states is also provided in circuitry rather than firmware or power control software. The mapping values may be programmable software or firmware, but detection, selection, and adjustment occur automatically in hardware without intervening input from firmware or software.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.