Four-terminal gate-controlled LVBJTs
US8115280B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 1, 2010 |
| Grant date | Feb 14, 2012 |
| Priority date | — |
| Expiry date | Mar 1, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
Abstract
An integrated circuit structure includes a well region of a first conductivity type, an emitter of a second conductivity type opposite the first conductivity type over the well region, a collector of the second conductivity type over the well region and substantially encircling the emitter, and a base contact of the first conductivity type over the well region. The base contact is horizontally spaced apart from the emitter by the collector. At least one conductive strip horizontally spaces the emitter, the collector, and the base contact apart from each other. A dielectric layer is directly under, and contacting, the at least one conductive strip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.