High linearity, low noise, wide bandwidth amplifier/buffer
US8115553B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 15, 2010 |
| Grant date | Feb 14, 2012 |
| Priority date | — |
| Expiry date | Sep 25, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/411
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A radio frequency wide band amplifier having a noise that does not exceed a threshold value, and a linearity better than a threshold value. The radio frequency wide band amplifier architecture includes a first stage amplifier and a second stage amplifier. The second stage amplifier includes an input source resistor (Rin) that receives an input voltage signal, a feedback resistor (Rfb) directly connected to the input source resistor, a p-type metal-oxide-semiconductor (PMOS) transistor directly connected to the input source resistor. The PMOS transistor receives an output from the input source resistor. A n-type metal-oxide-semiconductor (NMOS) transistor directly connected to the input source resistor. The NMOS transistor receives an output from the input source resistor. A lumped output resistor (Rout) that receives an output from the feedback resistor, the PMOS transistor, and the NMOS transistor. A terminal of the lumped output impedance is connected to ground.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.