Integrated front-end passive equalizer and method thereof
US8115566B2 · kind B2 · utility
6Cited by
4References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2011 |
| Grant date | Feb 14, 2012 |
| Priority date | — |
| Expiry date | Mar 15, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30111
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A passive equalizer circuit incorporated at a front-end of an integrated receiver circuit uses passive components that are distributed between inside and outside of an integrated circuit package. The passive equalizer circuit has off-chip components that are placed on a printed circuit board and on-chip components that are fabricated on a common integrated circuit die as a receiver chip. The on-chip components include one or more variable resistors for adjusting a degree of equalization. The off-chip components include one or more resistors for fine tuning input impedance matching of the integrated receiver circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.