Resistance RAM having oxide layer and solid electrolyte layer, and method for operating the same
US8116116B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2009 |
| Grant date | Feb 14, 2012 |
| Priority date | — |
| Expiry date | Feb 24, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8825
Abstract
A resistance RAM includes a first electrode, an oxide layer that is formed on the first electrode, a solid electrolyte layer that is disposed on the oxide layer, and a second electrode that is disposed on the solid electrolyte layer. A method of forming the resistance RAM includes forming a conductive tip in the oxide layer by applying reference voltage to any one of the electrodes of the resistance RAM, and applying foaming voltage to the remaining one, such that the oxide layer is electrically broken. A conductive filament is formed in the solid electrolyte layer by applying a positive voltage to the second electrode, and the conductive filament that is formed in the solid electrolyte layer is removed by applying a negative voltage to the second electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.