Method for packaging components
US8119502B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 24, 2007 |
| Grant date | Feb 21, 2012 |
| Priority date | — |
| Expiry date | Aug 16, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/804
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention relates to a method for the manufacture of packaged components. The invention is based here on the problem of facilitating the application of covers with lateral dimensions that are smaller than the lateral dimensions of the functional substrate. For this purpose, a plate-like cover substrate is mounted on a carrier substrate. Then, on the uncovered side of the plate-like cover substrate, trenches are inserted, so that a composite part is obtained with the carrier substrate and individual covering parts that are separated from each other by the trenches, but interconnected by the carrier substrate. The covering parts of the composite part are connected with a functional substrate with a plurality of components. Then, the connection of the covering parts is dissolved with the carrier substrate, and the carrier substrate is removed, so that a composite is obtained with the functional substrate and a plurality of covering parts that cover functional areas.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.