Lateral double-diffused metal oxide semiconductor (LDMOS) transistors
US8119507B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 23, 2008 |
| Grant date | Feb 21, 2012 |
| Priority date | — |
| Expiry date | Sep 6, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/693
Abstract
Methods of making, structures, devices, and/or applications for lateral double-diffused metal oxide semiconductor (LDMOS) transistors are disclosed. In one embodiment, an LDMOS transistor can include: (i) an n-doped deep n-well (DNW) region on a substrate; (ii) a gate oxide and a drain oxide between a source region and a drain region of the LDMOS transistor, the gate oxide being adjacent to the source region, the drain oxide being adjacent to the drain region; (iii) a conductive gate over the gate oxide and a portion of the drain oxide; (iv) a p-doped p-body region in the source region; (v) an n-doped drain region in the drain region; (vi) a first n-doped n+ region and a p-doped p+ region adjacent thereto in the p-doped p-body region of the source region; and (vii) a second n-doped n+ region in the drain region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.