Power semiconductor device and method of manufacturing the same
US8120096B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 3, 2009 |
| Grant date | Feb 21, 2012 |
| Priority date | — |
| Expiry date | Mar 16, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/393
Abstract
A power semiconductor device capable of transmitting gate signals in all directions (e.g., up-/down-ward/right-/left-ward) on a plane and a method of manufacturing the same. The power semiconductor device includes first conductive regions, formed to a predetermined depth in a surface of a conductive low concentration epitaxial layer. The first conductive regions include linear first conductive layers spaced from each other and linear second conductive layers spaced from each other. Second conductive regions are formed to a smaller width and depth than the first and second conductive layers to form channels in the first and second conductive layers. A gate oxide layer formed on a surface of the epitaxial layer defines first windows having a smaller width than the first conductive layers and second windows having a smaller width than the second conductive layers. A gate polysilicon layer is formed on the gate oxide layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.