Overlapping trench gate semiconductor device

US8120100B2 · kind B2 · utility

Assignee

• ANPEC ELECTRONICS CORPORATION · TW

Inventors

• Wei-Chieh Lin · Hsinchu, TW
• Jen-Hao Yeh · Taipei, TW
• Guo Yang · 安丰镇, CN
• Jia-Fu Lin · Sanxing, TW

Key dates

• Filing date: Nov 11, 2009
• Grant date: Feb 21, 2012
• Expiry date: Sep 17, 2030

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/62

Abstract

An overlapping trench gate semiconductor device includes a semiconductor substrate, a plurality of shallow trenches disposed on the semiconductor substrate, a first conductive layer disposed in the shallow trenches, a plurality of deep trenches respectively disposed in each shallow trench, a second conductive layer disposed in the deep trenches, a source metal layer and a gate metal layer. Each of the deep trenches extends into the semiconductor substrate under each shallow trench. The source metal layer is electrically connected to the second conductive layer, and the gate metal layer is electrically connected to the first conductive layer.