Thin embedded active IC circuit integration techniques for flexible and rigid circuits
US8120173B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 3, 2005 |
| Grant date | Feb 21, 2012 |
| Priority date | — |
| Expiry date | Jan 20, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K3/4617
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A flexible electronic circuit member formed of a plurality of dielectric layers includes a plurality of thinned semiconductor chips embedded within the circuit member for increased levels of integration and component density. The thinned semiconductor chips may include various integrated circuits thereon. They may be formed on various substrates and using various technologies and the embedded, thinned semiconductor chips are interconnected by a patterned interconnect that extends between and through the respective dielectric layers. A method for forming the flexible circuit member includes joining conventional semiconductor chips to a mounting apparatus then grinding the semiconductor chips to form thinned semiconductor chips that are joined to respective dielectric layers that combine to form the flexible electronic circuit member. A releasable bonding layer is used to join the semiconductor chip to a mounting assembly during the grinding operation and removed after the thinned semiconductor chips are joined to the respective dielectric layers used in combination to form the electronic circuit member.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.