Method and apparatus for verifying memory contents
US8122215B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 3, 2004 |
| Grant date | Feb 21, 2012 |
| Priority date | — |
| Expiry date | Jul 12, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L63/0823
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A system and method of verifying a content of a non-volatile reprogrammable memory communicatively coupled to a microprocessor is disclosed. The method comprises the steps of reading at least some of the data stored in the non-volatile reprogrammable memory, computing a value related to contents of the non-volatile reprogrammable memory, and comparing the value with a stored integrity value. The apparatus comprises a microprocessor, a non-volatile reprogrammable memory communicatively coupled to the microprocessor via a first communication path, the non-volatile memory for storing microprocessor program instructions, and a logical module, communicatively coupled to the non-volatile memory via a communication path independent from the first communication path, the logical module for verifying the data stored in the non-volatile reprogrammable memory by comparison of the contents of the non-volatile reprogrammable memory with a stored integrity value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.