Clock distribution chip
US8122277B1 · kind B1 · utility
6Cited by
4References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 13, 2009 |
| Grant date | Feb 21, 2012 |
| Priority date | — |
| Expiry date | Jul 10, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a clock distribution chip includes a clock input adapted to receive an input clock signal, clock dividers each adapted to receive a clock signal based on the first input clock signal and to generate a divided clock signal, and programmable clock outputs adapted to provide output clock signals. The clock outputs are configurable to support a number of signaling standards. A programmable switch fabric is coupled between the clock dividers and the clock outputs and is configurable to provide the divided clock signals to the clock outputs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.