Method and structure for thick layer transfer using a linear accelerator
US8124499B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 5, 2007 |
| Grant date | Feb 28, 2012 |
| Priority date | — |
| Expiry date | Nov 5, 2027 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02E10/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Free standing thickness of materials are fabricated using one or more semiconductor substrates, e.g., single crystal silicon, polysilicon, silicon germanium, germanium, group III/IV materials, and others. A semiconductor substrate is provided having a surface region and a thickness. The surface region of the semiconductor substrate is subjected to a first plurality of high energy particles generated using a linear accelerator to form a region of a plurality of gettering sites within a cleave region, the cleave region being provided beneath the surface region to defined a thickness of material to be detached, the semiconductor substrate being maintained at a first temperature. The surface region of the semiconductor substrate is subjected to a second plurality of high energy particles generated using the linear accelerator, the second plurality of high energy particles being provided to increase a stress level of the cleave region from a first stress level to a second stress level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.