Semiconductor memory device and access method thereof
US8125847B2 · kind B2 · utility
4Cited by
2References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 31, 2009 |
| Grant date | Feb 28, 2012 |
| Priority date | — |
| Expiry date | Mar 10, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4091
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Example embodiments provide a semiconductor memory device that may include: a cell array arranged in pluralities of rows and columns; and a sense amplifier conducting writing and reading operations to the cell array in response to writing and reading commands in correspondence with an access time, which may be variable in period. The sense amplifier adjusts pulse widths of write-in and read-out data in accordance with a period of the access time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.