Method of operation of a memory device and system including initialization at a first frequency and operation at a second frequency and a power down exit mode
US8127152B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 19, 2004 |
| Grant date | Feb 28, 2012 |
| Priority date | — |
| Expiry date | Nov 19, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods of operation of a memory device and system are provided in embodiments. Initialization operations are conducted at a first frequency of operation during an initialization sequence. Memory access operations are then performed at a second frequency of operation. The second frequency of operation is higher than the first frequency of operation. Also, the memory access operations include a read operation and a write operation. In an embodiment, information that represents the first frequency of operation and the second frequency of operation is read from a serial presence detect device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.