System and method for energy savings on a PHY/MAC interface for energy efficient ethernet
US8127164B2 · kind B2 · utility
7Cited by
6References
28Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 30, 2009 |
| Grant date | Feb 28, 2012 |
| Priority date | — |
| Expiry date | Apr 29, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L12/10
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A system and method for energy savings on a PHY/MAC interface for energy efficient Ethernet. Power savings for a PHY due to low-link utilization can also be realized in the higher layer elements that interface with the PHY. In one embodiment, subrating is implemented on a MAC/PHY interface to match a subrating of the PHY with a remote link partner. This subrating is less than the full capacity rate and can be zero.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.