Control method for semiconductor integrated circuit and semiconductor integrated circuit
US8127191B2 · kind B2 · utility
1Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2009 |
| Grant date | Feb 28, 2012 |
| Priority date | — |
| Expiry date | Apr 9, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0405
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit includes a self-test circuit, wherein, when a operation mode of the self-test circuit has been switched from a low-speed operation mode to a high-speed operation mode, processing is performed in the high-speed operation mode during a given time period, and the processing result is invalidated based on a control signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.