IC chip package employing substrate with a device hole
US8129825B2 · kind B2 · utility
3Cited by
1References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 30, 2007 |
| Grant date | Mar 6, 2012 |
| Priority date | — |
| Expiry date | Mar 13, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10681
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In one embodiment of the present invention, an IC chip mounting package includes a film base member and an IC chip connected via an interposer. Connecting terminals on the film base member side of the interposer are provided so as to have a pitch larger than that of connecting terminals of the IC. A device hole is opened to the film base member, and the IC chip is provided in the device hole. A distance between an inner lead leading end and a periphery of the device hole is set as not less than 10 μm.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.