Patent · US Active

Securely erasing flash-based memory

US8130554B1 · kind B1 · utility

69Cited by
1References
19Claims
0Family size

Assignee

Inventor

Key dates

Filing dateSep 29, 2008
Grant dateMar 6, 2012
Priority date
Expiry dateJan 5, 2031

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C16/14
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method is used in securely erasing flash-based memory. A new version of data is received for a logical location of a flash-based memory. An old version of the data of the logical location is stored in a first physical location in the flash-based memory. The old version of the data is caused to be subject to an obscure operation. The new version of the data is caused to be stored in a second physical location in the flash-based memory.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.