Multi-channel memory connection system and method
US8131903B2 · kind B2 · utility
5Cited by
19References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 30, 2007 |
| Grant date | Mar 6, 2012 |
| Priority date | — |
| Expiry date | Sep 27, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10159
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A multi-channel memory connection system comprises a circuit board comprising a plurality of memory connectors, at least one of the plurality of memory connectors configured to receive either a memory module or a memory riser, the at least one memory connector having at least two memory channels connected thereto through the circuit board.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.