Power adjustment based on completion times in a parallel computing system
US8132031B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 17, 2009 |
| Grant date | Mar 6, 2012 |
| Priority date | — |
| Expiry date | Apr 27, 2030 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method, apparatus, and program product optimize power consumption in a parallel computing system that includes a plurality of computing nodes by selectively throttling performance of selected nodes to effectively slow down the completion of quicker executing parts of a workload of the computing system when those parts are dependent upon or otherwise associated with the completion of other, slower executing parts of the same workload. Parts of the workload are executed on the computing nodes, including concurrently executing a first part on a first computing node and a second part on a second computing node. The first node is selectively throttled during execution of the first part to decrease power consumption of the first node and conform a completion time of for the first node in completing the first part of the workload with a completion time for the second node in completing the second part.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.