System and method for locating a fault on a device under test
US8132052B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 12, 2008 |
| Grant date | Mar 6, 2012 |
| Priority date | — |
| Expiry date | Jun 12, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2836
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
System and method for analyzing operation of a device under test (DUT). In one embodiment, a reference component associated with a reference device may be received. The reference device may be in communication with the DUT and a component associated with the DUT can be exchanged with the reference component. A test may be performed on the DUT, wherein a result of the test may correspond to a source of a fault associated with the DUT. An indication of the source of the fault may be provided based on the test result.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.