Logical partition memory
US8135937B2 · kind B2 · utility
17Cited by
7References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Nov 17, 2008 |
| Grant date | Mar 13, 2012 |
| Priority date | — |
| Expiry date | Jul 3, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1036
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A mechanism is provided, in a data processing system, for accessing memory based on an effective address submitted by a process of a partition. The mechanism may translate the effective address into a virtual address using a segment look-aside buffer. The mechanism may further translate the virtual address into a partition real address using a page table. Moreover, the mechanism may translate the partition real address into a system real address using a logical partition real memory map for the partition. The system real address may then be used to access the memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.