Updating firmware with multiple processors
US8136108B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 3, 2008 |
| Grant date | Mar 13, 2012 |
| Priority date | — |
| Expiry date | Jan 12, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1433
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention provides apparatuses, methods, and computer readable media for updating memory containing representations of computer-executable instructions in a processing system. A primary processor receives original sets of computer-readable instructions and updated sets of computer-readable instructions for the processors in processor system from a host system. The sets of computer-readable instructions are stored in memory (e.g., flash memory), where each processor in the system may utilize different sets. The primary processor then initiates updating its firmware with the corresponding updated set. If the update is unsuccessful, the primary processor reverts to the original set and the update process is terminated. Otherwise, the firmware update proceeds to the secondary processor. If the firmware update succeeds, the next secondary processor is updated. Otherwise, all of the updated processors revert to the corresponding original set of computer-readable instructions and the updating process is terminated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.