System comprised of a chip and a substrate and method of assembling such a system
US8136737B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 25, 2007 |
| Grant date | Mar 20, 2012 |
| Priority date | — |
| Expiry date | Jan 6, 2029 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49137
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A system comprises a chip (71) and a substrate (78). The chip (71) comprises a circuitry and a mounting surface (83) with first and second contacts (73, 74, 75, 76). The substrate (78) comprises a surface (90) with first and second contact pads (79, 80) and an electrically conductive pad (91) connected to the first contact pad (79) by a low-resistive connection (93). The chip (71) is attached to the substrate (78) so that the mounting surface (83) is spaced apart from the first contact pad (75) and the electrically conductive pad (91). The mounting surface (83) overlaps partly the first contact pad (79) with a first overlapping area (B1) resulting in a first stray capacitor (C1) and the electrically conductive pad (91) with a second overlapping area (B3) resulting in a second stray capacitor (C3). The first contact pad (79) and the electrically conductive pad (91) are arranged on the surface (90) of the substrate (78) such that, if the chip (21) is misaligned laterally in respect to the surface (90), then the first overlapping area (B1) increases while the second overlapping area (B3) decreases, or the first overlapping area (B1) decreases while the second overlapping area (B3) inc…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.