Thin film transistor array substrate and method for manufacturing the same
US8138548B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 16, 2010 |
| Grant date | Mar 20, 2012 |
| Priority date | — |
| Expiry date | Oct 27, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/423
Abstract
A thin film transistor array substrate includes a substrate, a gate layer, a gate insulating layer, a source/drain layer, a patterned protective layer, an oxide semiconductor layer, a resin layer and a pixel electrode. The gate layer is disposed on the substrate. The gate insulating layer is disposed on the gate layer and the substrate. The source/drain layer is disposed on the gate insulating layer. The patterned protective layer is disposed on the source/drain layer and exposes a portion of the source/drain layer. The oxide semiconductor layer is disposed on the patterned protective layer and electrically connected to the source/drain layer. The resin layer is disposed on the oxide semiconductor layer and covers the oxide semiconductor layer. The pixel electrode is disposed on the resin layer and connects to the source/drain layer. The present invention also provides a method for making the thin film transistor array substrate. The thin film transistor array substrate can prevent leakage current.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.