Integrated electronic circuit
US8138750B2 · kind B2 · utility
9Cited by
5References
5Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Nov 10, 2006 |
| Grant date | Mar 20, 2012 |
| Priority date | — |
| Expiry date | Jan 23, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01D3/08
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Disclosed is an integrated electronic circuit comprising a core circuit that generates a useful signal as well as a buffer for storing the useful signal. The buffer stores the last read value of the useful signal for a predetermined period of time when the power supply is interrupted, and the buffer is disconnected from the power supply of the other circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.