Bit swap architecture in digital subscriber line communication systems
US8139472B1 · kind B1 · utility
0Cited by
7References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 23, 2007 |
| Grant date | Mar 20, 2012 |
| Priority date | — |
| Expiry date | May 17, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/2692
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A system includes a linked-list generator module that generates a linked list of tones based on tones and bit loads of the respective tones in a digital subscriber line (DSL) communication system, a trellis encoder module that encodes data bits associated with respective ones of the tones, and a bit application module that communicates the data bits to the trellis encoder module based on the linked list.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.