Network element bypass in computing computer architecture
US8139477B2 · kind B2 · utility
1Cited by
4References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 24, 2009 |
| Grant date | Mar 20, 2012 |
| Priority date | — |
| Expiry date | Feb 27, 2030 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus in accordance with the present invention provides monitoring a self-adjusting multi-tier processing system. At least one computing resource of one of the tiers of the self-adjusting multi-tier processing system is dynamically bypassed based on at least one predetermined criterion, wherein dynamically bypassing energizes or de-energizes a bypass control switch that operates to route data between tiers of the system in a manner that excludes the at least one computing resource.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.